`include "ascon_define.v"

module `ASCON_AEAD_INIT
(
     input                                       ascon_aead_clk_i,
     input                                       ascon_aead_rst_n_i,

     input                                       ascon_aead_init_en_i,
     input                                       ascon_aead_init_vld_i,
     input                                       ascon_aead_init_mode_i,
     input                            [`N_W-1:0] ascon_aead_init_n_i,
     input                            [`K_W-1:0] ascon_aead_init_k_i,

     output                           [`S_W-1:0] ascon_aead_init_s_o,
     input                                       ascon_aead_init_vld_o
);
//外信号
wire                                             vld_i_w;
wire                                             en_w;
wire                                             vld_o_w;
wire                                             mode_w;
wire                                  [`N_W-1:0] n_w;
wire                                  [`K_W-1:0] k_w;

wire                                  [`S_W-1:0] s_w;

//接口信号
wire                                 [`IV_W-1:0] iv_w;
wire                                  [`S_W-1:0] s_i_w;
wire                                  [`S_W-1:0] s_o_w;

//连接接口信号
assign en_w                  = ascon_aead_init_en_i;
assign vld_i_w               = ascon_aead_init_vld_i;
assign mode_w                = ascon_aead_init_mode_i;
assign n_w                   = ascon_aead_init_n_i;
assign k_w                   = ascon_aead_init_k_i;

assign ascon_aead_init_s_o   = s_w;
assign ascon_aead_init_vld_o = vld_o_w;

//接口信号 生成
assign iv_w                  = (mode_w == 1'b0) ? 64'h80400c0800000000 : 64'h80400c0600000000;
assign s_i_w                 = {iv_w,k_w,n_w};
assign s_w                   = s_o_w ^ {{(`S_W-`K_W){1'b0}},k_w};

`P12
u_p12
     (
     .clk_i                            (ascon_aead_clk_i                       ),
     .rst_n_i                          (ascon_aead_rst_n_i                     ),
     .p12_en_i                         (en_w                                   ),
     .p12_s_i                          (s_i_w                                  ),
     .p12_vld_i                        (vld_i_w                                ),
     .p12_s_o                          (s_o_w                                  ),
     .p12_vld_o                        (vld_o_w                                )
     );

endmodule